The present invention generally relates to a contactless IC card system. More specifically, the present invention is directed to an amplifying circuit, a modulating circuit, a demodulating circuit, a transmitter apparatus, and a receiver apparatus, applicable to a contactless IC card capable of reading/writing various sorts of data in a contactless manner, and is also applicable to an IC card reader/writer capable of communicating data with this contactless IC card.
Conventionally, in IC card systems which employ IC cards, these IC card systems are applied to ticket inspection systems used in transportation facilities, and person entrance/exit management systems for rooms. Such conventional IC card systems utilize IC cards carried by users and IC card readers/writers capable of transmitting/receiving various sorts of data between the IC cards and the readers/writers. These data may be transmitted/received in the contactless manner between the IC cards and the IC card readers/writers.
In other words, in this sort of IC card system, an IC card reader/writer modulates a carrier wave having a preselected frequency by using a desired data stream so as to produce a transmission signal, and then transmits this produced transmission signal to the IC card.
The IC card receives this transmission signal via an antenna, and then demodulates this transmission signal to decode the data sent from the IC card reader/writer. Furthermore, the IC card modulates internally saved data, such as personal data, by using a preselected carrier wave in response to this received data, and then sends out the modulated data to the IC card reader/writer.
Then, the IC card reader/writer receives the data sent from this IC card. Based upon this received data, a door of a ticket inspection machine is opened/closed. Also, any person is allowed to enter into a room, and/or to come out from this room.
In such a conventional IC card system, these data are modulated by the ASK (Amplitude Shift Keying) modulating method, and then the ASK-modulated data is transmitted/received between the IC card and the card reader/writer. Conventionally, as such a modulating means for an ASK modulation signal, a modulating circuit with using a variable gain amplifying circuit, and a multiplying circuit is employed. Also, as such a demodulating means for the ASK modulation signal, a demodulating circuit with using an envelope detecting circuit constructed of a diode, and using a synchronization detecting circuit is employed.
FIG. 1 is a schematic block diagram for showing one conventional modulating circuit constructed of this variable gain amplifying circuit. In this modulating circuit 1, the gain of the variable gain amplifying circuit 2 is switched in response to a logic level of a data stream D to be sent. Also, a carrier signal SC is amplified by this variable gain amplifying circuit 2. As a result, this modulating circuit 1 modulates the amplitude of the carrier signal SC outputted from the variable gain amplifying circuit 2 in response to the logic level of the data stream D so as to produce an ASK modulation signal SM.
Also, FIG. 2 is a schematic block diagram for indicating another conventional modulating circuit arranged by a balanced modulating circuit with employment of a multiplying circuit. In this modulating circuit 3, the carrier signal SC is multiplied by the data stream D in the multiplying circuit 4, and while the amplitude of this carrier signal SC is varied in response to the logic level of the data stream D, the ASK modulation signal SM is produced.
In contrast, FIG. 3 is a schematic block diagram for showing one conventional demodulating circuit arranged by an envelope detecting circuit with employment of a diode. In this demodulating circuit 6, the ASK modulation signal SM is rectified by employing the diode D. Furthermore, this rectified ASK modulation signal SM is entered into a smoothing circuit having a predetermined time constant defined by a resistor R and a capacitor C. As a result, the envelope-detected output of the ASK modulation signal is outputted as the demodulation signal SD.
FIG. 4 is a schematic block diagram for representing another conventional demodulating circuit arranged by a synchronization detecting circuit. In this demodulating circuit 8, a carrier signal component SCC is extracted from the ASK modulation signal SM by employing a phase-synchronization system circuit 9 arranged by, for example, a filter circuit arrangement and a PLL circuit arrangement. Both this carrier signal component SCC is multiplied by the ASK modulation signal SM by a multiplying circuit 10. In the demodulating circuit 8, a baseband component is extracted from the multiplied result of this multiplying circuit 10 by a low-pass filter (LPF) 12 to thereby be outputted as the demodulation signal SD.
On the other hand, the following demands are made in these conventional IC card systems. That is, these modulating circuits and demodulating circuits can be simply and readily manufactured in the IC form in combination with other circuit blocks. Moreover, these modulating/demodulating circuits can be operated in high efficiencies.
Moreover, these modulating circuits and demodulating circuits with employment of the conventional circuit arrangements can hardly satisfy the necessary items for the IC card systems.
In further detail, in the modulating circuit arranged by the variable gain amplifying circuit, the voltage range which can be effectively utilized by the variable gain amplifying circuit is limited. This voltage range limitation causes the lower power efficiency of the conventional modulating circuit. Also, as to the modulating circuit with employment of the multiplying circuit, there are such drawbacks that the circuit arrangement becomes complex, and this complex modulating circuit cannot be simply and readily manufactured in the IC form.
For instance, also in the power amplifying circuit for the ASK modulation signal, which is similarly required to be manufactured in the IC form similar to such modulating circuits, the ASK modulation signal must be amplified while saving a change contained in the amplitudes of this ASK modulation signal. After all, this power amplifying circuit must be operated in the better linearity region. This causes a power efficiency to be lowered also in the power amplifying circuit. Also, this power amplifying circuit has a drawback in that in order to transmit sufficiently high power, the active elements capable of satisfying the necessary allowable current and the allowable loss must be used instead of commercially available general-purpose electronic components.
In contrast, the demodulating circuit arranged by the envelope detecting circuit with employment of the diode owns such a drawback that a leakage current is produced in the diode when this demodulating circuit is manufactured in the IC form, and therefore, the detection efficiency of the ASK modulation signal is considerably lowered. In other words, as shown in FIG. 5, when an envelope detecting circuit with employment of a diode is manufactured in the IC form, both polarities must be set to floating potentials at the diode D. As a result, a stray transistor is necessarily produced. Accordingly, as represented in FIG. 6, a leakage current is produced.
On the other hand, in the conventional demodulating circuit arranged by the synchronization detecting circuit, there is another drawback in that the circuit arrangement of the phase synchronization system circuit 9 becomes complex.
The present invention has been made to solve the above-explained drawbacks of the prior art, and therefore, has an object to provide a modulating circuit, a demodulating circuit, an amplifying circuit used in this modulating circuit, and furthermore, a transmitter apparatus as well as a receiver apparatus with employment of these modulating circuit and demodulating circuit, which can be simply and easily manufactured with an IC form in combination with other circuit blocks, and also which can be operated in high efficiencies.
Another object of the present invention is to provide the following modulating circuit, amplifying circuit applicable to this modulating circuit, and also a transmitter apparatus with using this modulating circuit. That is, first and second output signals having predetermined phases with respect to an input signal are added to each other, and the added result is outputted. At least, the second output signal is gated in response to the input data. Also, on the output side of a power amplifying circuit, the power-amplified results are attenuated in accordance with the input data so as to produce an amplitude-modulated signal. This circuit arrangement can be simply and readily manufactured in the IC form together with other circuit blocks.
Also, since amplitude-modulated signals are biased to be amplified, or clamped, a demodulating circuit and a receiver apparatus with using this demodulating circuit can be simply and easily manufactured in the IC form in combination with other circuit blocks.
Furthermore, amplitude-modulated signals are clamped, polarities of these amplitude-modulated signals are judged to multiply the polarity judgment result by the amplitude-modulated signals, and furthermore, the amplitude-modulated signals are selectively outputted based upon the polarity judgment results of the amplitude-modulated signals. As a result, another demodulating circuit and another receiver apparatus with using this demodulating circuit can be simply and readily manufactured in the IC form together with other circuit blocks.
To achieve the above-described objects, a modulating circuit, according to a first aspect of the present invention, includes:
first signal output means for outputting a first output signal having a predetermined phase with respect to that of an input signal;
a second signal output means for outputting a second output signal having a predetermined phase with respect to that of the input signal;
gate means for gating at least the second output signal;
calculation means for adding, or subtracting the first output signal and the second output signal; and
control means for controlling the operation of the gate means in response to a logic level of input data.
Also, a modulating circuit as recited in the first aspect, according to a second aspect, is configured so that:
the first signal output means outputs the first output signal having the same phase as that of the input signal; and
the second signal output means outputs the second output signal having the phase opposite to that of the input signal.
Another aspect of the above-described modulating circuit as recited in the first aspect, according to a third aspect, is configured so that:
the first signal output means power-amplifies the first output signal to output the power-amplified first output signal; and
the second signal output means power-amplifies the second output signal to output the power-amplified second output signal.
A modulating circuit as recited in the first aspect, according to a fourth aspect, includes features wherein:
the input signal is constituted by a sine wave signal having a single frequency.
A modulating circuit as recited in the first aspect, according to a fifth aspect, includes features wherein:
the input signal is constituted by a rectangular wave signal having a single frequency.
A modulating circuit as recited in the fifth aspect, according to a sixth aspect, includes features wherein:
the second signal output means outputs the second output signal having the phase opposite to that of the input signal by inverting the logic level of the input signal.
A modulating circuit as recited in the third aspect, according to a seventh aspect, includes features wherein:
the gate means controls to stop the power amplifying process operation by the second signal output means so as to gate the second output signal; and
the second signal output means maintains an impedance of an output terminal at a high impedance for a time period during which the power amplifying process operation is stopped.
A modulating circuit as recited in the third aspect, according to an eighth aspect, includes features wherein:
both the first output signal means and the second output signal means are arranged by a switching circuit for switching operations in response to the input signal.
A modulating circuit as recited in the third aspect, according to a ninth aspect, includes features wherein:
at least the second signal output means and the gate means are tri-state buffer circuits.
A modulating circuit as recited in the first aspect, according to a tenth aspect, includes features wherein:
the first signal output means outputs the first output signal from a first antenna;
the second signal output means outputs the second output signal from a second antenna; and
the calculation means is formed by way of an electromagnetic coupling between the first antenna and the second antenna.
Also, to achieve the above-described objects, an amplifying circuit, according to an eleventh aspect of the present invention, includes an amplifying circuit in which an operation of a field-effect transistor is switched in response to an input signal so as to output a power-amplified signal of the input signal from the field-effect transistor, comprising:
a drive circuit for switching the operation of the field-effect transistor by applying a voltage to a gate of the field-effect transistor, the voltage being higher than, or equal to a source-to-drain voltage of the field-effect transistor.
An amplifying circuit as recited in the eleventh aspect, according to a twelfth aspect, includes features wherein:
an output terminal is constituted in such a manner that the output terminal can be set to a high impedance.
Further, to achieve the above-explained objects, an amplifying circuit, according to a thirteenth aspect of the present invention, includes:
first variable resistor means, one end of which is held at a first potential, and the resistance value of which is varied in response to a first control signal;
second variable resistor means, one end of which is connected to the other end of the first variable resistor means, the other end of which is held at a second potential different from the first potential, and the resistance value of which is varied in response to a second control signal; and
control means for switching a signal level of the first control signal and a signal level of the second control signal so as to switch a potential at a connection center point between the first variable resistor means and the second variable resistor means to another potential corresponding to the first and second potentials, and also so as to switch an impedance of the connection center point to a high impedance in response to both an input signal and a control signal.
An amplifying circuit as recited in the thirteenth aspect according to a fourteenth aspect, includes features wherein:
the first variable resistor means and the second variable resistor means are field-effect transistors.
An amplifying circuit as recited in the fourteenth aspect according to a fifteenth aspect, includes features wherein:
the control means switches the signal level of the control signal and the signal level of the second control signal to a voltage higher than, or equal to a source-to-drain voltage of the field-effect transistor.
To achieve these objects, a transmitter apparatus, according to a sixteenth aspect of the present invention, includes a transmitter apparatus for amplitude-modulating input data by using a modulating circuit to thereby transmit the amplitude-modulated input data, wherein:
the modulating circuit is comprised of:
first signal output means for outputting a first output signal having a predetermined phase with respect to that of an input signal;
a second signal output means for outputting a second output signal having a predetermined phase with respect to that of the input signal;
gate means for gating at least the second output signal;
calculation means for adding, or subtracting the first output signal and the second output signal; and
control means for controlling the operation of the gate means in response to a logic level of input data.
A transmitter apparatus as recited in the sixteenth aspect, according to a seventeenth aspect, includes features wherein:
the first signal output means outputs the first output signal from a first antenna;
the second signal output means outputs the second output signal from a second antenna; and
the calculation means is formed by way of an electromagnetic coupling between the first antenna and the second antenna.
Also, to achieve the objects, a transmitter apparatus according to an eighteenth aspect of the present invention, includes a transmitter apparatus for amplitude-modulating input data to thereby transmit the amplitude-modulated input data, which:
a first modulating circuit for producing a first amplitude-modulated signal in response to the input data; and
a second modulating circuit for producing a second amplitude-modulated signal made of a carrier wave having a phase opposite to that of the first amplitude-modulated signal; wherein:
each of the first modulating circuit and the second modulating circuit is comprised of:
first signal output means for outputting a first output signal having a predetermined phase with respect to that of an input signal;
a second signal output means for outputting a second output signal having a predetermined phase with respect to that of the input signal;
gate means for gating at least the second output signal;
calculation means for adding, or subtracting the first output signal and the second output signal; and
control means for controlling the operation of the gate means in response to a logic level of input data.
To achieve these objects, a modulating circuit, according to a nineteenth aspect of the present invention, includes:
a variable attenuator provided at an output terminal of a power amplifying circuit, for attenuating a power-amplified result of the power amplifying circuit in response to an input signal.
A modulating circuit as recited in the nineteenth aspect, according to a twentieth aspect, includes features wherein:
the signal amplified by the power amplifying circuit is constituted by a sine wave signal having a single frequency.
A modulating circuit as recited in the nineteenth aspect, according to a twenty-first aspect, includes features wherein:
the signal amplified by the power amplifying circuit is constituted by a rectangular wave signal having a single frequency.
Further, to achieve the above objects, a transmitter apparatus, according to a twenty-second aspect of the present invention, is featured by such a transmitter apparatus comprising a modulating circuit by way of an amplitude modulation, wherein:
the modulating circuit is includes:
a variable attenuator provided at an output terminal of a power amplifying circuit, for attenuating a power-amplified result of the power amplifying circuit in response to an input signal.
Also, to achieve these objects, a transmitter apparatus, according to a twenty-third aspect of the present invention, is featured by such a transmitter apparatus for amplitude-modulating an input signal to thereby transmit the amplitude-modulated input signal, includes:
a first modulating circuit for producing a first amplitude-modulated signal in response to the input signal; and
a second modulating circuit for producing a second amplitude-modulated signal made of a carrier wave having a phase opposite to that of the first amplitude-modulated signal in response to the input signal; wherein:
each of the first modulating circuit and the second modulating circuit includes:
a variable attenuator provided at an output terminal of a power amplifying circuit, for attenuating a power-amplified result of the power amplifying circuit in response to an input signal.
Also, to achieve the objects, a demodulating circuit, according to a twenty-fourth aspect of the present invention includes:
amplifying means for amplifying an input signal;
bias means for biasing the input signal; and
band limiting means for removing a component of the input signal from the output signal derived from the amplifying means.
A demodulating circuit as recited in the twenty-fourth aspect, according to a twenty-fifth aspect, includes features wherein:
the amplifying means corresponds to any one of an amplifying circuit with employment of a transistor, another amplifying circuit with employment of a field-effect transistor, and a differential amplifier circuit.
A demodulating circuit as recited in the twenty-fourth aspect, according to a twenty-sixth aspect, is featured by that:
the band limiting means corresponds to any one of a low-pass filter, a band-pass filter, and a trap filter.
also, to achieve the objects, a receiver apparatus, according to a twenty-seventh aspect of the present invention, is featured by such a receiver apparatus for demodulating sequentially-entered amplitude-modulated signals by using a demodulating circuit, wherein:
the demodulating circuit is comprised of:
amplifying means for amplifying the amplitude-modulated signal;
bias means for biasing the amplitude-modulated signal; and
band limiting means for removing a component of the amplitude-modulating signal from the output signal derived from the amplifying means.
Also, to achieve these objects, a demodulating circuit, according to a twenty-eighth aspect of the present invention, is featured includes:
a limiter for limiting an amplitude of an input signal; and
band limiting means for removing a component of the input signal from the output signal derived from the limiter.
A demodulating circuit as recited in the twenty-eighth aspect, according to a twenty-ninth aspect, includes features wherein:
the limiter is constituted by a series circuit formed by connecting a diode in series to a constant voltage power source.
A demodulating circuit as recited in the twenty-eighth aspect, according to a thirtieth aspect, includes features wherein:
the band limiting means corresponds to any one of a low-pass filter, a band-pass filter, and a trap filter.
Also, to achieve the objects, a receiver apparatus, according to a thirty-first aspect of the present invention, includes features for demodulating sequentially-entered amplitude-modulated signals by using a demodulating circuit, wherein:
the demodulating circuit includes:
a limiter for limiting the amplitude of the amplitude-modulated signal; and
band limiting means for removing a component of the amplitude-modulated signal from the output signal of the limiter.
Further, a demodulating circuit, according to a thirty-second aspect of the present invention, includes:
clamping means for clamping an input signal; and
band limiting means for removing a component of the input signal from the output signal of the clamping means.
A demodulating circuit as recited in the thirty-second aspect, according to a thirty-third aspect, includes features wherein:
the clamping means is constituted by a grounded type diode.
A demodulating circuit as recited in the thirty-second aspect, according to a thirty-fourth aspect, includes features wherein:
the band limiting means corresponds to any one of a low-pass filter, a band-pass filter, and a trap filter.
Also, to achieve the objects, a receiver apparatus, according to a thirty-fifth aspect of the present invention, includes features for demodulating sequentially-entered amplitude-modulated signals by using a demodulating circuit, wherein:
the demodulating circuit includes:
clamping means for clamping the amplitude-modulated signal; and
band limiting means for removing a component of the amplitude-modulated signal from the output signal of the clamping means.
Also, to achieve the object, a demodulating circuit, according to a thirty-sixth aspect of the present invention, is featured by such a demodulating circuit comprising:
signal processing means for producing first and second input signals having phases different from a phase of an input signal by approximately 180 degrees;
first clamping circuit for clamping the first input signal;
second clamping circuit for clamping the second input signal;
first band limiting means for removing a component of the first input signal from the output signal of the first clamping circuit;
second band limiting means for removing a component of the second input signal from the output signal of the first clamping means; and
calculating means for adding, or averaging the output signal of the first band limiting means and the output signal of the second band limiting means.
A demodulating circuit as recited in the thirty-sixth aspect, according to a thirty-seventh aspect, includes features wherein:
the first and second clamping means are constituted by a grounded type diode.
A demodulating circuit as recited in the thirty-sixth aspect, according to a thirty-eighth aspect, is featured by that:
the band limiting means corresponds to any one of a low-pass filter, a band-pass filter, and a trap filter.
To achieve the objects, a receiver apparatus, according to a thirty-ninth aspect of the present invention, features a receiver apparatus for demodulating sequentially-entered amplitude-modulated signals by using a demodulating circuit, wherein:
the demodulating circuit includes:
signal processing means for producing first and second amplitude-modulated signals having phases different from a phase of the amplitude-modulated signal by approximately 180 degrees;
first clamping circuit for clamping the first amplitude-modulated signal;
second clamping circuit for clamping the second amplitude-modulated signal;
first band limiting means for removing a component of the first amplitude-modulated signal from the output signal of the first clamping circuit;
second band limiting means for removing a component of the second amplitude-modulated signal from the output signal of the first clamping means; and
calculating means for adding, or averaging the output signal of the first band limiting means and the output signal of the second band limiting means.
Further, to achieve the objects, a demodulating circuit, according to a fortieth aspect of the present invention, includes:
signal processing means for producing first and second input signals having phases different from a phase of an input signal by approximately 180 degrees;
first clamping circuit for clamping the first input signal; second clamping circuit for clamping the second input signal;
calculating means for adding, or averaging the output signal of the first band limiting means and the output signal of the second band limiting means; and
band limiting means for removing a component of the input signal from the output signal of the calculating means.
A demodulating circuit as recited in the fortieth aspect, according to a forty-first aspect, includes features wherein:
the first and second clamping means are constituted by a grounded type diode.
A demodulating circuit as recited in the fortieth aspect, according to a forty-second aspect, includes features wherein:
the band limiting means corresponds to any one of a low-pass filter, a band-pass filter, and a trap filter.
To achieve the objects, a receiver apparatus, according to a 43rd aspect of the present invention, includes features for demodulating sequentially entered amplitude-modulated signals by using a demodulating circuit, wherein:
the demodulating circuit includes:
signal processing means for producing first and second amplitude-modulated signals having phases different from a phase of the amplitude-modulated signal by approximately 180 degrees;
first clamping circuit for clamping the first amplitude-modulated signal;
second clamping circuit for clamping the second amplitude-modulated signal;
calculating means for adding, or averaging the output signal of the first band limiting means and the output signal of the second band limiting means; and
band limiting means for removing a component of the amplitude-modulated signal from the output signal of the calculating means.
To achieve the objects, a demodulating apparatus, according to a forty-fourth aspect of the present invention, a demodulating apparatus including:
polarity judging means for judging a polarity of an amplitude-modulated signal to thereby output a polarity judgment result;
multiplying means for multiplying the polarity judgment result by the amplitude-modulated signal to thereby output a multiplication result; and
band limiting means for removing a component of the amplitude-modulated signal from the multiplication result.
A demodulating circuit as recited in the forty-fourth aspect, according to a forty-fifth aspect, includes features wherein:
the polarity judging means is constituted by a limiter for limiting the amplitude of the amplitude-modulated signal on a positive side and on a negative side.
A demodulating circuit as recited in the forty-fourth aspect, according to a forty-sixth aspect, includes features wherein:
the multiplying means is constructed of a double balanced mixer.
A demodulating circuit as recited in the forty-fourth aspect, according to a forty-seventh aspect, is featured by that:
the band limiting means corresponds to any one of a low-pass filter, a band-pass filter, and a trap filter.
Furthermore, to achieve the objects, a receiver apparatus, according to a forty-eighth aspect of the present invention, is featured by such a receiver apparatus for demodulating sequentially-entered amplitude-modulated signals by using a demodulating circuit, wherein:
the demodulating circuit includes:
polarity judging means for judging a polarity of an amplitude-modulated signal to thereby output a polarity judgment result;
multiplying means for multiplying the polarity judgment result by the amplitude-modulated signal to thereby output a multiplication result; and
band limiting means for removing a component of the amplitude-modulated signal from the multiplication result.
Moreover, to achieve the objects, a demodulating circuit, according to a forty-ninth aspect of the present invention, includes:
signal producing means for producing first and second amplitude-modulated signals having phases inverted from each other from an amplitude-modulated signal;
polarity judging means for judging a polarity of one of the amplitude-modulated signal, the first amplitude-modulated signal, and the second amplitude-modulated signal to thereby output a polarity judgment result;
selecting/outputting means for selectively outputting the first amplitude-modulated signal and the second amplitude-modulated signal based upon the polarity judgment result; and
band limiting means for removing a component of the amplitude-modulated signal from the output signal of the selecting/outputting means.
A demodulating circuit as recited in the forty-ninth aspect, according to a fiftieth aspect, includes features wherein:
the band limiting means corresponds to any one of a low-pass filter, a band-pass filter, and a trap filter.
Also, to achieve the objects, a receiver apparatus, according to a fifty-first aspect of the present invention, includes a receiver apparatus for demodulating sequentially-entered amplitude-modulated signals by using a demodulating circuit, wherein:
the demodulating circuit is comprised of:
signal producing means for producing first and second amplitude-modulated signals having phases inverted from each other from an amplitude-modulated signal;
polarity judging means for judging a polarity of one of the amplitude-modulated signal, the first amplitude-modulated signal, and the second amplitude-modulated signal to thereby output a polarity judgment result;
selecting/outputting means for selectively outputting the first amplitude-modulated signal and the second amplitude-modulated signal based upon the polarity judgment result; and
band limiting means for removing a component of the amplitude-modulated signal from the output signal of the selecting/outputting means.